名称:多功能交通灯控制系统设计VHDL代码Quartus? DE2-115开发板
软件:Quartus
语言:VHDL
代码功能:
多功能交通灯控制系统
要求设计一个多功能交通灯控制系统。并进行软件仿真与硬件实现。
要求做到:
(1)主干道绿灯亮时,支干道红灯亮,反之亦然,两者交替允许通行,主干道每次放行60s,支干道每次放行45s.每次由绿灯变为红灯的过程中,黄灯亮3S作为过渡;
(2)能实现正常的倒计时显示功能;
(3)能实现总体清零功能:计数器由初始状态开始计数,对应状态的指示灯亮;
(4)能实现特殊状态的功能显示:进入特殊状态时,东西、南北路口均显示红灯状态;
(5)在任何一个时刻,有一盏灯亮而且只有一盏灯亮。否则发出故障信号,提醒相关人员去维修。
要求学生有一定的模拟及数字电子技术知识,对VHDL语言比较熟悉,有一定的动手能力。
FPGA代码Verilog/VHDL代码资源下载:www.hdlcode.com
本代码已在DE2-115开发板验证,DE2-115开发板如下,其他开发板可以修改管脚适配:
演示视频:
设计文档:
1.?工程文件
2.?程序文件
3.?管脚分配
4.?程序编译
5.?RTL图
6.?仿真图
整体仿真图
分频模块仿真图
交通灯控制模块
显示模块
部分代码展示:
LIBRARY?ieee; ???USE?ieee.std_logic_1164.all; --交通灯 ENTITY?Traffic_Light_Control?IS ???PORT?( ??????clk?????:?IN?STD_LOGIC;--50Mhz reset_n?:?IN?STD_LOGIC;--复位 control?:?IN?STD_LOGIC;--特殊功能 ??????R1??????:?OUT?STD_LOGIC;--高电平亮,主路红灯 ??????G1??????:?OUT?STD_LOGIC;--高电平亮,主路绿灯 ??????Y1??????:?OUT?STD_LOGIC;--高电平亮,主路黄灯 ??????R2??????:?OUT?STD_LOGIC;--高电平亮,支路红灯 ??????G2??????:?OUT?STD_LOGIC;--高电平亮,支路绿灯 ??????Y2??????:?OUT?STD_LOGIC;--高电平亮,支路黄灯 ??????HEX0????:?OUT?STD_LOGIC_VECTOR(6?DOWNTO?0);--数码管0 ??????HEX1????:?OUT?STD_LOGIC_VECTOR(6?DOWNTO?0);--数码管1 ??????HEX2????:?OUT?STD_LOGIC_VECTOR(6?DOWNTO?0);--数码管2 ??????HEX3????:?OUT?STD_LOGIC_VECTOR(6?DOWNTO?0)--数码管3 ???); END?Traffic_Light_Control; ARCHITECTURE?behave?OF?Traffic_Light_Control?IS --分频模块 COMPONENT?CLOCK?IS--?Divide?50MHz?to?1Hz GENERIC(D?:?INTEGER?:=?50);--仿真时改小为50加快仿真速度,实际上板验证时改为50000000 ???PORT(CLK:?IN?STD_LOGIC; ?????????DAV:?OUT?STD_LOGIC); ???END?COMPONENT; --显示模块 ???COMPONENT?HEX?IS ??????PORT?( ?????????clk?????:?IN?STD_LOGIC; ?????????SMG_1???:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0); ?????????SMG_2???:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0); ?????????HEX0????:?OUT?STD_LOGIC_VECTOR(6?DOWNTO?0); ?????????HEX1????:?OUT?STD_LOGIC_VECTOR(6?DOWNTO?0); ?????????HEX2????:?OUT?STD_LOGIC_VECTOR(6?DOWNTO?0); ?????????HEX3????:?OUT?STD_LOGIC_VECTOR(6?DOWNTO?0) ??????); ???END?COMPONENT; ??? --交通灯控制模块 ???COMPONENT?RGY?IS ??????PORT?( ?????????clk_1???:?IN?STD_LOGIC; clk???:?IN?STD_LOGIC; reset_n?:?IN?STD_LOGIC;--复位 control?:?IN?STD_LOGIC;----特殊功能 ?????????G1_time?:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0); ?????????Y1_time?:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0); ?????????G2_time?:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0); ?????????Y2_time?:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0); ?????????R1??????:?OUT?STD_LOGIC; ?????????G1??????:?OUT?STD_LOGIC; ?????????Y1??????:?OUT?STD_LOGIC; ?????????R2??????:?OUT?STD_LOGIC; ?????????G2??????:?OUT?STD_LOGIC; ?????????Y2??????:?OUT?STD_LOGIC; ??????SMG1?????:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0);--输出数码管显示数 ??????SMG2?????:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0)--输出数码管显示数 ??????); ???END?COMPONENT; ??? ??? ???SIGNAL?clk_1??????:?STD_LOGIC; ???SIGNAL?SMG1???????:?STD_LOGIC_VECTOR(7?DOWNTO?0); ???SIGNAL?SMG2???????:?STD_LOGIC_VECTOR(7?DOWNTO?0); ??? ???SIGNAL?R1_led?????:?STD_LOGIC; ???SIGNAL?G1_led?????:?STD_LOGIC; ???SIGNAL?Y1_led?????:?STD_LOGIC; ??? ???SIGNAL?R2_led?????:?STD_LOGIC; ???SIGNAL?G2_led?????:?STD_LOGIC; ???SIGNAL?Y2_led?????:?STD_LOGIC; ??? ???SIGNAL?G1_time????:?STD_LOGIC_VECTOR(7?DOWNTO?0); ???SIGNAL?Y1_time????:?STD_LOGIC_VECTOR(7?DOWNTO?0); ???SIGNAL?G2_time????:?STD_LOGIC_VECTOR(7?DOWNTO?0); ???SIGNAL?Y2_time????:?STD_LOGIC_VECTOR(7?DOWNTO?0); ??? ???SIGNAL?HEX0_SIG?:?STD_LOGIC_VECTOR(6?DOWNTO?0); ???SIGNAL?HEX1_SIG?:?STD_LOGIC_VECTOR(6?DOWNTO?0); ???SIGNAL?HEX2_SIG?:?STD_LOGIC_VECTOR(6?DOWNTO?0); ???SIGNAL?HEX3_SIG?:?STD_LOGIC_VECTOR(6?DOWNTO?0); BEGIN
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