名称:DS18B20温度显示设计VHDL代码Quartus? DE2开发板
软件:Quartus
语言:VHDL
代码功能:DS18B20温度显示
FPGA代码Verilog/VHDL代码资源下载:www.hdlcode.com
本代码已在DE2开发板验证,DE2开发板如下,其他开发板可以修改管脚适配:
演示视频:
设计文档:
1.?工程文件
2.?程序文件
3.?程序编译
4.?RTL图
5.?管脚分配
6.?Testbench
7.?仿真图
显示和蜂鸣器控制模块仿真
部分代码展示:
LIBRARY?ieee; ???USE?ieee.std_logic_1164.all; ENTITY?DS18B20_dis?IS ???PORT?( ??????clk???????:?IN?STD_LOGIC;--50MHz ??????rst_n?????:?IN?STD_LOGIC;--复位 ??????one_wire??:?INOUT?STD_LOGIC;--DS18B20信号 ??????beep??????:?OUT?STD_LOGIC;--蜂鸣器 ??????HEX0??????:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0);--数码管 ??????HEX1??????:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0);--数码管 ??????HEX2??????:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0)--数码管 ???); END?DS18B20_dis; ARCHITECTURE?behavioral?OF?DS18B20_dis?IS --数码管显示模块 COMPONENT?display?IS ???PORT?( ??????clk???????????:?IN?STD_LOGIC; ??????temperature??:?IN?STD_LOGIC_VECTOR(15?DOWNTO?0);--温度值 ??beep?????????:?OUT?STD_LOGIC;--蜂鸣器 ??????--数码管 ??????HEX0????????:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0); ??????HEX1????????:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0); ??????HEX2????????:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0) ???); END?COMPONENT;??? --DS18B20驱动模块 COMPONENT?ds18b20_drive?IS ???PORT?( ??????clk??????????:?IN?STD_LOGIC;?--?50MHz时钟 ??????rst_n????????:?IN?STD_LOGIC;--?异步复位 ??????one_wire?????:?INOUT?STD_LOGIC;--?One-Wire总线 ??????temperature??:?OUT?STD_LOGIC_VECTOR(15?DOWNTO?0)?--?输出温度值 ???); END?COMPONENT; ???SIGNAL?temperature?:?STD_LOGIC_VECTOR(15?DOWNTO?0); BEGIN ??? ???i_ds18b20_drive?:?ds18b20_drive ??????PORT?MAP?( ?????????clk??????????=>?clk, ?????????rst_n????????=>?rst_n, ?????????one_wire?????=>?one_wire, ?????????temperature??=>?temperature ??????);
点击链接获取代码文件:http://www.hdlcode.com/index.php?m=home&c=View&a=index&aid=1189
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