基于FPGA的多功能数字钟VHDL代码Quartus仿真

名称：基于FPGA的多功能数字钟VHDL代码Quartus仿真

软件：Quartus

语言：VHDL

代码功能：

多功能数字钟EDA-SOPC实验箱(EP3C16)验证

1、可以分为计时、闹钟两种模式；

2、可以修改时间和闹钟；

3、可以关闭闹钟。

使用方法：一共4个控制按键，S1~S4，S1为模式设置按键，通过这个按键可以设置当然显示的是闹钟时间还是实际计时时间，S2是修改时间按键，修改方法为，先按下S2，再按S4修改小时，修改后按下S3确认，再按S4修改分钟，修改后按下S3确认，再按S4修改秒钟，修改后按下S3确认就推出修改模式了。闹钟时间修改也是一样，就是先按S1切换到闹钟显示，再修改。闹钟响时，按下S4关闭。

FPGA代码Verilog/VHDL代码资源下载：www.hdlcode.com

演示视频：

设计文档：

1. 工程文件

2. 程序文件

3. 程序编译

4. RTL图

5. 仿真图

分频模块

按键模块

模式控制模块

计时模块

闹钟模块

秒表模块

响铃模块（LED代表响铃）

倒计时模块

显示模块

部分代码展示:

LIBRARY?ieee;
???USE?ieee.std_logic_1164.all;
ENTITY?Digital_clock?IS
???PORT?(
??????clk_50M?????:?IN?STD_LOGIC;--48M时钟
??????key_0???????:?IN?STD_LOGIC;--模式设置按键--4'd0:计时，4'd1：闹钟，4'd2:跑表，4'd3:定时
??????key_1???????:?IN?STD_LOGIC;--设置修改,跑表启动
??????key_2???????:?IN?STD_LOGIC;--修改确认,跑表暂停
??????key_3???????:?IN?STD_LOGIC;--修改时分秒,跑表复位,闹钟关闭
??????
??????bell_out????:?OUT?STD_LOGIC;
??????led_mode????:?OUT?STD_LOGIC_VECTOR(3?DOWNTO?0);--led显示当前模式
??????SEL??:?OUT?STD_LOGIC_VECTOR(2?DOWNTO?0);--数码管位选
??????seg_select??:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0)--数码管段选
???);
END?Digital_clock;
ARCHITECTURE?behave?OF?Digital_clock?IS
--模块声明
???--响铃模块
???COMPONENT?Bell?IS
??????PORT?(
?????????clk_50M?????:?IN?STD_LOGIC;
?????????clear_alarm?:?IN?STD_LOGIC;
?????????alarm_hour_time?:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????alarm_minute_time?:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????alarm_second_time?:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????hour_time???:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????minute_time?:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????second_time?:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????countdown_hour_time?:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????countdown_minute_time?:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????countdown_second_time?:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????bell_out????:?OUT?STD_LOGIC
??????);
???END?COMPONENT;
???--闹钟模块
???COMPONENT?alarm_clock?IS
??????PORT?(
?????????clk_50M?????:?IN?STD_LOGIC;
?????????state_mode??:?IN?STD_LOGIC_VECTOR(3?DOWNTO?0);
?????????set_time_key?:?IN?STD_LOGIC;
?????????confirm_key?:?IN?STD_LOGIC;
?????????change_time_key?:?IN?STD_LOGIC;
?????????alarm_hour_time?:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????alarm_minute_time?:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????alarm_second_time?:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0)
??????);
???END?COMPONENT;
???--显示模块
???COMPONENT?display?IS
??????PORT?(
?????????clk?????????:?IN?STD_LOGIC;
?????????state_mode??:?IN?STD_LOGIC_VECTOR(3?DOWNTO?0);
?????????alarm_hour_time?:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????alarm_minute_time?:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????alarm_second_time?:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????stopwatch_Millisecond?:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????stopwatch_second?:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????stopwatch_minute?:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????hour_time???:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????minute_time?:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????second_time?:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????countdown_hour_time?:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????countdown_minute_time?:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????countdown_second_time?:?IN?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????SEL??:?OUT?STD_LOGIC_VECTOR(2?DOWNTO?0);
?????????seg_select??:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0)
??????);
???END?COMPONENT;
???--设置模式
???COMPONENT?set_mode?IS
??????PORT?(
?????????clk_50M?????:?IN?STD_LOGIC;
?????????set_mode_key?:?IN?STD_LOGIC;
?????????led_mode????:?OUT?STD_LOGIC_VECTOR(3?DOWNTO?0);
?????????state_mode??:?OUT?STD_LOGIC_VECTOR(3?DOWNTO?0)
??????);
???END?COMPONENT;
???--倒计时模块
???COMPONENT?timing?IS
??????PORT?(
?????????clk_50M?????:?IN?STD_LOGIC;
?????????clk_1Hz?????:?IN?STD_LOGIC;
?????????state_mode??:?IN?STD_LOGIC_VECTOR(3?DOWNTO?0);
?????????set_time_key?:?IN?STD_LOGIC;
?????????confirm_key?:?IN?STD_LOGIC;
?????????change_time_key?:?IN?STD_LOGIC;
?????????countdown_hour_time?:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????countdown_minute_time?:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????countdown_second_time?:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0)
??????);
???END?COMPONENT;
???--秒表模块
???COMPONENT?stopwatch?IS
??????PORT?(
?????????clk_50M?????:?IN?STD_LOGIC;
?????????clk_100Hz???:?IN?STD_LOGIC;
?????????state_mode??:?IN?STD_LOGIC_VECTOR(3?DOWNTO?0);
?????????start_key???:?IN?STD_LOGIC;
?????????stop_key????:?IN?STD_LOGIC;
?????????reset_key???:?IN?STD_LOGIC;
?????????stopwatch_Millisecond?:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????stopwatch_second?:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????stopwatch_minute?:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0)
??????);
???END?COMPONENT;
???--分频模块
???COMPONENT?fenping?IS
??????PORT?(
?????????clk_50M?????:?IN?STD_LOGIC;
?????????clk_1Hz?????:?OUT?STD_LOGIC;
?????????clk_100Hz???:?OUT?STD_LOGIC
??????);
???END?COMPONENT;
???--按键消抖
???COMPONENT?key_jitter?IS
??????PORT?(
?????????clkin???????:?IN?STD_LOGIC;
?????????key_in??????:?IN?STD_LOGIC;
?????????key_negedge?:?OUT?STD_LOGIC
??????);
???END?COMPONENT;
???--计时模块
???COMPONENT?jishi?IS
??????PORT?(
?????????clk_50M?????:?IN?STD_LOGIC;
?????????clk_1Hz?????:?IN?STD_LOGIC;
?????????state_mode??:?IN?STD_LOGIC_VECTOR(3?DOWNTO?0);
?????????set_time_key?:?IN?STD_LOGIC;
?????????confirm_key?:?IN?STD_LOGIC;
?????????change_time_key?:?IN?STD_LOGIC;
?????????hour_time???:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????minute_time?:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0);
?????????second_time?:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0)
??????);
???END?COMPONENT;

点击链接获取代码文件：http://www.hdlcode.com/index.php?m=home&c=View&a=index&aid=705