名称:QPSK调制和解调VHDL代码Quartus仿真
软件:Quartus
语言:VHDL
代码功能:
QPSK调制和解调
1、使用正弦波作为载波;
2、实现QPSK调制功能,输出QPSK调制波形;
3、实现QPSK解调功能,将QPSK调制信号解调出数据。
FPGA代码Verilog/VHDL代码资源下载:www.hdlcode.com
演示视频:
设计文档:
1. 工程文件
2. 程序文件
3. 程序编译
4. Testbench
5. 仿真图
调制过程:首先通过m序列产生随机信号,作为调制信号,再将改信号转换为2为并行数据,通过在正弦波基础上改变相位得到QPSK信号。
5.1 QPSK调制部分
解调过程:将QPSK信号与sin和cos载波相乘,再对相乘的结果进行滤波,即可解调得到原信号。
5.2 QPSK解调部分
部分代码展示:
LIBRARY?ieee; ???USE?ieee.std_logic_1164.all; --QPSK调制模块 ENTITY?QPSK_modulate?IS ???PORT?( ??????clk???:?IN?STD_LOGIC; ??????rst???:?IN?STD_LOGIC; ??????qout??:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0) ???); END?QPSK_modulate; ARCHITECTURE?behave?OF?QPSK_modulate?IS ???--串并转换模块 ???COMPONENT?sipo?IS ??????PORT?( ?????????clk???:?IN?STD_LOGIC; ?????????dout??:?IN?STD_LOGIC; ?????????a?????:?OUT?STD_LOGIC; ?????????b?????:?OUT?STD_LOGIC ??????); ???END?COMPONENT; ??? --m序列,用于产生调制信号 ???COMPONENT?m_code?IS ??????PORT?( ?????????clk???:?IN?STD_LOGIC; ?????????rst???:?IN?STD_LOGIC; ?????????dout??:?OUT?STD_LOGIC ??????); ???END?COMPONENT; ??? --调制载波 ???COMPONENT?carrier_wave?IS ??????PORT?( ?????????clk???:?IN?STD_LOGIC; ?????????qout??:?OUT?STD_LOGIC_VECTOR(7?DOWNTO?0); ?????????a?????:?IN?STD_LOGIC; ?????????b?????:?IN?STD_LOGIC ??????); ???END?COMPONENT; ??? ??? ???SIGNAL?dout???????:?STD_LOGIC; ???SIGNAL?div2???????:?STD_LOGIC; ???SIGNAL?a??????????:?STD_LOGIC; ???SIGNAL?b??????????:?STD_LOGIC; ???SIGNAL?qout_buf?:?STD_LOGIC_VECTOR(7?DOWNTO?0); BEGIN --输出调制信号 ???qout?<=?qout_buf; ????? ???--调用m序列 ???i_m_code?:?m_code ??????PORT?MAP?( ?????????clk???=>?clk, ?????????rst???=>?rst, ?????????dout??=>?dout--输出m序列 ??????); ??? --串并转换 ???i_sipo?:?sipo ??????PORT?MAP?( ?????????clk???=>?clk, ?????????dout??=>?dout,--串行输入 ?????????a?????=>?a,--输出 ?????????b?????=>?b?--输出 ??????); ??? ???--载波模块??? ???i_carrier_wave?:?carrier_wave ??????PORT?MAP?( ?????????clk???=>?clk, ?????????qout??=>?qout_buf,--QPSK调制信号 ?????????a?????=>?a, ?????????b?????=>?b ??????); ??? END?behave;
点击链接获取代码文件:http://www.hdlcode.com/index.php?m=home&c=View&a=index&aid=524
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