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lanqee
发自：dev.eefocus.com
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FPGA的FLASH 控制器设计源代码，包含modelsim测试程序和仿真实现。
flsh controler\an500_CN.pdf
..............\code\nand_interface.v
..............\modelsim\nand_flash_testbench.v
..............\........\nand_interface.cr.mti
..............\........\nand_interface.mpf
..............\........\nand_interface.v
..............\........\transcript
..............\........\vsim.wlf
..............\........\wave.bmp
..............\........\wave.do
..............\........\.ork\nand_flash_testbench\verilog.psm
..............\........\....\....................\_primary.dat
..............\........\....\....................\_primary.vhd
..............\........\....\.....interface\verilog.psm
..............\........\....\..............\_primary.dat
..............\........\....\..............\_primary.vhd
..............\........\....\_info
..............\quartus\db\nand_interface.asm.qmsg
..............\.......\..\nand_interface.asm_labs.ddb
..............\.......\..\nand_interface.cbx.xml
..............\.......\..\nand_interface.cmp.cdb
..............\.......\..\nand_interface.cmp.hdb
..............\.......\..\nand_interface.cmp.logdb
..............\.......\..\nand_interface.cmp.rdb
..............\.......\..\nand_interface.cmp.tdb
..............\.......\..\nand_interface.cmp0.ddb
..............\.......\..\nand_interface.dbp
..............\.......\..\nand_interface.db_info
..............\.......\..\nand_interface.eco.cdb
..............\.......\..\nand_interface.fit.qmsg
..............\.......\..\nand_interface.hier_info
..............\.......\..\nand_interface.hif
..............\.......\..\nand_interface.map.cdb
..............\.......\..\nand_interface.map.hdb
..............\.......\..\nand_interface.map.logdb
..............\.......\..\nand_interface.map.qmsg
..............\.......\..\nand_interface.pre_map.cdb
..............\.......\..\nand_interface.pre_map.hdb
..............\.......\..\nand_interface.psp
..............\.......\..\nand_interface.pss
..............\.......\..\nand_interface.rtlv.hdb
..............\.......\..\nand_interface.rtlv_sg.cdb
..............\.......\..\nand_interface.rtlv_sg_swap.cdb
..............\.......\..\nand_interface.sgdiff.cdb
..............\.......\..\nand_interface.sgdiff.hdb
..............\.......\..\nand_interface.signalprobe.cdb
..............\.......\..\nand_interface.sld_design_entry.sci
..............\.......\..\nand_interface.sld_design_entry_dsc.sci
..............\.......\..\nand_interface.syn_hier_info
..............\.......\..\nand_interface.tan.qmsg
..............\.......\..\nand_interface.tis_db_list.ddb
..............\.......\..\prev_cmp_nand_interface.asm.qmsg
..............\.......\..\prev_cmp_nand_interface.fit.qmsg
..............\.......\..\prev_cmp_nand_interface.map.qmsg
..............\.......\..\prev_cmp_nand_interface.qmsg
..............\.......\..\prev_cmp_nand_interface.tan.qmsg
..............\.......\nand_interface.asm.rpt
..............\.......\nand_interface.done
..............\.......\nand_interface.dpf
..............\.......\nand_interface.fit.rpt
..............\.......\nand_interface.fit.smsg
..............\.......\nand_interface.fit.summary
..............\.......\nand_interface.flow.rpt
..............\.......\nand_interface.map.rpt
..............\.......\nand_interface.map.summary
..............\.......\nand_interface.pin
..............\.......\nand_interface.pof
..............\.......\nand_interface.qarlog
..............\.......\nand_interface.qpf
..............\.......\nand_interface.qsf
..............\.......\nand_interface.qws
..............\.......\nand_interface.tan.rpt
..............\.......\nand_interface.tan.summary
..............\.......\nand_interface.v
..............\.......\nand_interface_assignment_defaults.qdf
..............\testbench\nand_flash_testbench.v
..............\modelsim\work\nand_flash_testbench
..............\........\....\nand_interface
..............\........\work
..............\quartus\db
..............\code
..............\modelsim
..............\quartus
..............\testbench
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FPGA/DSP
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2012-08-08
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